A multiplier architecture for user selectable extensions of F2n

Authors

  • Mullin, Ronald C.

Abstract

Let n, k, and K denote positive integers. We describe a unified VLSI architecture for performing multiplications in F2nk, where n is fixed, and k satisfies the requirements 1 ≤ k ≤ K and (n, k) = 1.

Published

2003-05-09

How to Cite

Mullin, Ronald C. (2003). A multiplier architecture for user selectable extensions of F2n. Utilitas Mathematica, 63. Retrieved from https://utilitasmathematica.com/index.php/Index/article/view/293

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